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Message-ID: <20091207200326.GU22533@pengutronix.de>
Date: Mon, 7 Dec 2009 21:03:26 +0100
From: Robert Schwebel <r.schwebel@...gutronix.de>
To: Herring Robert-RA7055 <ra7055@...escale.com>
Cc: Sascha Hauer <s.hauer@...gutronix.de>,
Amit Kucheria <amit.kucheria@...onical.com>,
List Linux Kernel <linux-kernel@...r.kernel.org>,
grant.likely@...retlab.ca, valentin.longchamp@...l.ch,
daniel@...aq.de, Nguyen Dinh-R00091 <R00091@...escale.com>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [RFC][PATCH 03/10] arm: mxc: changes to common plat-mxc codeto
add support for i.MX5
Rob,
On Mon, Dec 07, 2009 at 10:17:52AM -0700, Herring Robert-RA7055 wrote:
> Sorry, my mistake. Sasha is correct that MX27 is v1 and MX25 is v2.
>
> timer_is_v1 is just !timer_is_v2, so really only one is needed. I would
> define it like this to avoid having to change the timer code again for
> any new chips:
>
> #define timer_is_v2() (!(cpu_is_mx1() || cpu_is_mx21() ||
> cpu_is_mx27()))
Are you sure that FSL won't invent a v3 timer in the future?
rsc
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