linux-kernel - Re: [PATCH 4/12] PCI PM: Make it possible to force using INTx for PCIe PME signaling

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Message-ID: <20100106135625.14b37f10@jbarnes-piketon>
Date:	Wed, 6 Jan 2010 13:56:25 -0800
From:	Jesse Barnes <jbarnes@...tuousgeek.org>
To:	"Rafael J. Wysocki" <rjw@...k.pl>
Cc:	Matthew Garrett <mjg@...hat.com>, Len Brown <lenb@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	pm list <linux-pm@...ts.linux-foundation.org>,
	Alan Stern <stern@...land.harvard.edu>,
	ACPI Devel Maling List <linux-acpi@...r.kernel.org>,
	Linux PCI <linux-pci@...r.kernel.org>,
	Oliver Neukum <oliver@...kum.org>,
	Bjorn Helgaas <bjorn.helgaas@...com>,
	Shaohua Li <shaohua.li@...el.com>,
	Francois Romieu <romieu@...zoreil.com>
Subject: Re: [PATCH 4/12] PCI PM: Make it possible to force using INTx for
 PCIe PME signaling

On Sun, 27 Dec 2009 21:02:22 +0100
"Rafael J. Wysocki" <rjw@...k.pl> wrote:

> From: Rafael J. Wysocki <rjw@...k.pl>
> 
> Apparently, some machines may have problems with PCI run-time power
> management if MSIs are used for the hative PCIe PME signaling.  In
> particular, on the MSI Wind U-100 PCIe PME interrupts are not
> generated by a PCIe root port after a resume from suspend to RAM, if
> the system wake-up was triggered by a PME from the device attached to
> this port.  [It doesn't help to free the interrupt on suspend and
> request it back on resume, even if that is done along with disabling
> the MSI and re-enabling it, respectively.]  However, if INTx
> interrupts are used for this purpose on the same machine, everything
> works just fine.
> 
> For this reason, add a kernel command line switch allowing one to
> request that MSIs be not used for the native PCIe PME signaling,
> introduce a DMI table allowing us to blacklist machines that need
> this switch to be set by default and put the MSI Wind U-100 into this
> table.
> 
> Signed-off-by: Rafael J. Wysocki <rjw@...k.pl>
> ---

This scares me a little... seems like we're not restoring some state on
resume that's needed for MSIs to work?  Looks fine though.

-- 
Jesse Barnes, Intel Open Source Technology Center
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