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Message-ID: <Pine.LNX.4.44L0.1002161042350.1716-100000@iolanthe.rowland.org>
Date:	Tue, 16 Feb 2010 10:44:26 -0500 (EST)
From:	Alan Stern <stern@...land.harvard.edu>
To:	"Shilimkar, Santosh" <santosh.shilimkar@...com>
cc:	Oliver Neukum <oliver@...kum.org>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Catalin Marinas <catalin.marinas@....com>,
	Pavel Machek <pavel@....cz>, Greg KH <greg@...ah.com>,
	Matthew Dharm <mdharm-kernel@...-eyed-alien.net>,
	Sergei Shtylyov <sshtylyov@...mvista.com>,
	Ming Lei <tom.leiming@...il.com>,
	Sebastian Siewior <bigeasy@...utronix.de>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	"Mankad, Maulik Ojas" <x0082077@...com>
Subject: RE: USB mass storage and ARM cache coherency

On Tue, 16 Feb 2010, Shilimkar, Santosh wrote:

> > Your original patch however kills ehci, ohci and uhci on some architectures.
> Well the patch was making _ONLY_ control transfers use PIO and rest of
> the transfer would still use dma. So not sure how much performance impact would
> be because of that.
> Another issue with that patch is there are few controllers which can't do PIO
> at all and hence the patch would broke those controllers.

More than "a few"!  None of the EHCI, OHCI, or UHCI controllers used in
Intel-compatible desktop and laptop systems can do PIO.  That's what 
Oliver meant.

Alan Stern

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