linux-kernel - Re: USB mass storage and ARM cache coherency

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Message-ID: <1267131178.23523.1729.camel@pasglop>
Date:	Fri, 26 Feb 2010 07:52:58 +1100
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	Alan Stern <stern@...land.harvard.edu>
Cc:	Catalin Marinas <catalin.marinas@....com>,
	Matthew Dharm <mdharm-kernel@...-eyed-alien.net>,
	linux-usb@...r.kernel.org,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	"Mankad,Maulik Ojas" <x0082077@...com>,
	Sergei Shtylyov <sshtylyov@...mvista.com>,
	Ming Lei <tom.leiming@...il.com>,
	Sebastian Siewior <bigeasy@...utronix.de>,
	Oliver Neukum <oliver@...kum.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	"Shilimkar,Santosh" <santosh.shilimkar@...com>,
	Pavel Machek <pavel@....cz>, Greg KH <greg@...ah.com>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	James Bottomley <James.Bottomley@...senPartnership.com>
Subject: Re: USB mass storage and ARM cache coherency

On Wed, 2010-02-24 at 16:50 -0500, Alan Stern wrote:
> The main issue here is that the same host controller will use PIO
> sometimes and DMA sometimes, depending on the details of the
> transfer.  
> The USB core didn't expect this and consequently we violated the rules
> for DMA mapping.  The question is: If the core is fixed so that the
> rules aren't violated, will everything work correctly? 

As long as the only issue is that one (ie, doing PIO while dma-map'ed),
then yes, I'd say things should work. If not, then there is -another-
problem to be fixed :-)

Cheers,
Ben.


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