linux-kernel - [tip:perf/core] x86, perf: Unmask LVTPC only if we have APIC supported

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Message-ID: <tip-8576e1971663ffdb6139041de97cdd2e1d4791cc@git.kernel.org>
Date:	Sat, 13 Mar 2010 16:21:37 GMT
From:	tip-bot for Cyrill Gorcunov <gorcunov@...nvz.org>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	gorcunov@...nvz.org, peterz@...radead.org, ming.m.lin@...el.com,
	tglx@...utronix.de, mingo@...e.hu
Subject: [tip:perf/core] x86, perf: Unmask LVTPC only if we have APIC supported

Commit-ID:  8576e1971663ffdb6139041de97cdd2e1d4791cc
Gitweb:     http://git.kernel.org/tip/8576e1971663ffdb6139041de97cdd2e1d4791cc
Author:     Cyrill Gorcunov <gorcunov@...nvz.org>
AuthorDate: Sat, 13 Mar 2010 11:11:16 +0300
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Sat, 13 Mar 2010 13:32:27 +0100

x86, perf: Unmask LVTPC only if we have APIC supported

Ingo reported:

 |
 | There's a build failure on -tip with the P4 driver, on UP 32-bit, if
 | PERF_EVENTS is enabled but UP_APIC is disabled:
 |
 | arch/x86/built-in.o: In function `p4_pmu_handle_irq':
 | perf_event.c:(.text+0xa756): undefined reference to `apic'
 | perf_event.c:(.text+0xa76e): undefined reference to `apic'
 |

So we have to unmask LVTPC only if we're configured to have one.

Reported-by: Ingo Molnar <mingo@...e.hu>
Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
CC: Lin Ming <ming.m.lin@...el.com>
CC: Peter Zijlstra <peterz@...radead.org>
LKML-Reference: <20100313081116.GA5179@...ovo>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/perf_event_p4.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 381f593..ef861da 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -365,8 +365,10 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
 	}
 
 	if (handled) {
+#ifdef CONFIG_X86_LOCAL_APIC
 		/* p4 quirk: unmask it again */
 		apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
+#endif
 		inc_irq_stat(apic_perf_irqs);
 	}
 
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