linux-kernel - Re: [PATCH] perf, x86: Add Nehelem PMU programming errata workaround

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Message-ID: <bd4cb8901003281453u52378b6cr6d57186702271c54@mail.gmail.com>
Date:	Sun, 28 Mar 2010 22:53:42 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Andi Kleen <andi@...stfloor.org>
Cc:	Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...e.hu>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] perf, x86: Add Nehelem PMU programming errata workaround

On Sat, Mar 27, 2010 at 10:27 PM, Andi Kleen <andi@...stfloor.org> wrote:
> Peter Zijlstra <peterz@...radead.org> writes:
>
>> Subject: perf, x86: Add Nehelem PMU programming errata workaround
>> From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
>> Date: Fri Mar 26 13:59:41 CET 2010
>>
>> Implement the workaround for Intel Errata AAK100 and AAP53.
>>
>> Also, remove the Core-i7 name for Nehalem events since there are also
>> Westmere based i7 chips.
>
> Did you actually see this happen?
>
This is the same as AAJ91. At the time, I created a test program and it was
moderately easy to reproduce.

> It looks like this will make the context switch into a perf
> enabled process _MUCH_ more expensive, MSR writes are very slow.
>
Yes, but there is no alternative, I suspect.
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