linux-kernel - Re: [LKML] Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines

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Message-ID: <AANLkTine8JmtsUo3_z6Cwdgm3LINCkJ9jL21r9eQWRm8@mail.gmail.com>
Date:	Wed, 12 May 2010 00:35:45 -0400
From:	Mike Frysinger <vapier.adi@...il.com>
To:	FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
Cc:	npiggin@...e.de, marc@...silica.com, dmitry.torokhov@...il.com,
	jw@...ix.com, cl@...ux.com, penberg@...helsinki.fi,
	mpm@...enic.com, akpm@...ux-foundation.org, os@...ix.com,
	Michael.Hennerich@...log.com, linux-input@...r.kernel.org,
	linux-kernel@...r.kernel.org, dg@...ix.com, osw@...ix.com,
	rientjes@...gle.com, dbrownell@...rs.sourceforge.net,
	grant.likely@...retlab.ca, chris@...kel.net,
	Piet.Delaney@...silica.com
Subject: Re: [LKML] Re: [PATCH v3] ad7877: keep dma rx buffers in seperate 
	cache lines

On Tue, May 11, 2010 at 23:23, FUJITA Tomonori wrote:
> Seems that kmalloc is not cacheline aligned on some architectures but
> they works. Probably, we might be just lucky because in general they
> allocate larger buffers than 64 for DMA via kmalloc and the buffers
> are aligned on the size?

i think the magic combo is:
 - DMA buffer is written to (receive)
 - some driver state is in the same cacheline as the DMA buffer
 - that driver state is used after the flush but before the DMA finishes
 - only on arches that need software cache coherency

so i could see this not being an obvious issue for many people
-mike
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