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Message-ID: <20100616170354.GA5530@nowhere>
Date: Wed, 16 Jun 2010 19:03:56 +0200
From: Frederic Weisbecker <fweisbec@...il.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: paulus <paulus@...ba.org>,
stephane eranian <eranian@...glemail.com>,
Robert Richter <robert.richter@....com>,
Will Deacon <will.deacon@....com>,
Paul Mundt <lethal@...ux-sh.org>,
Cyrill Gorcunov <gorcunov@...il.com>,
Lin Ming <ming.m.lin@...el.com>,
Yanmin <yanmin_zhang@...ux.intel.com>,
Deng-Cheng Zhu <dengcheng.zhu@...il.com>,
David Miller <davem@...emloft.net>,
linux-kernel@...r.kernel.org
Subject: Re: [RFC][PATCH 3/8] perf: register pmu implementations
On Wed, Jun 16, 2010 at 06:00:30PM +0200, Peter Zijlstra wrote:
> +static void bp_perf_event_destroy(struct perf_event *event)
> +{
> + release_bp_slot(event);
> +}
> +
> +static struct pmu *bp_perf_event_init(struct perf_event *bp)
> +{
> + int err;
> +
> + if (event->attr.type != PERF_TYPE_BREAKPOINT)
> + return -ENOENT;
> +
> + err = register_perf_hw_breakpoint(bp);
> + if (err)
> + return err;
> +
> + bp->destroy = bp_perf_event_destroy;
> +
> + return 0;
> +}
> +
> +static struct pmu perf_breakpoint = {
> + .event_init = hw_breakpoint_event_init,
Should be bp_perf_event_init?
> + .enable = arch_install_hw_breakpoint,
> + .disable = arch_uninstall_hw_breakpoint,
> + .read = hw_breakpoint_pmu_read,
> +};
<snip>
> +static int perf_swevent_int(struct perf_event *event)
> +{
> + if (event->attr.type != PERF_TYPE_SOFTWARE)
> + return -ENOENT
perf_swevent_init() ?
> +int perf_pmu_register(struct pmu *pmu)
> +{
> + spin_lock(&pmus_lock);
> + list_add_rcu(&pmu->entry, &pmus);
> + spin_unlock(&pmus_lock);
> +
> + return 0;
> +}
> +
> +void perf_pmu_unregister(struct pmu *pmu)
> +{
> + spin_lock(&pmus_lock);
> + list_del_rcu(&pmu->entry);
> + spin_unlock(&pmus_lock);
> +
> + synchronize_srcu(&pmus_srcu);
> +}
Who needs this?
> +
> +struct pmu *perf_init_event(struct perf_event *event)
> +{
> + struct pmu *pmu;
> + int idx;
> +
> + idx = srcu_read_lock(&pmus_srcu);
> + list_for_each_entry_rcu(pmu, &pmus, entry) {
> + int ret = pmu->event_init(event);
> + if (!ret)
> + break;
> + if (ret != -ENOENT) {
> + pmu = ERR_PTR(ret);
> + break;
> }
> - pmu = &perf_ops_generic;
> - break;
> }
> + srcu_read_unlock(&pmus_srcu, idx);
This could use a simple mutex instead of a spinlock + srcu_sync on
writer and srcu on reader.
That doesn't matter much that said. What I don't understand is
why we need to synchronize the writers. Walking the list with
list_*_rcu() looks justified once we support boot events, but
until then...
For the rest of the patch, the whole idea is nice.
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