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Message-ID: <4C1A54C8.7020909@zytor.com>
Date:	Thu, 17 Jun 2010 10:00:56 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	"Pan, Jacob jun" <jacob.jun.pan@...el.com>
CC:	"Eric W. Biederman" <ebiederm@...ssion.com>,
	"kerstin.jonsson" <kerstin.jonsson@...csson.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"jbohac@...ell.com" <jbohac@...ell.com>,
	Yinghai Lu <yinghai@...nel.org>,
	"mingo@...e.hu" <mingo@...e.hu>, Avi Kivity <avi@...hat.com>,
	"trenn@...e.de" <trenn@...e.de>
Subject: Re: [PATCH] x86 apic: Ack all pending irqs when crashed/on kexec
 - V5

On 06/17/2010 09:52 AM, Pan, Jacob jun wrote:
>> On 06/16/2010 02:11 PM, Pan, Jacob jun wrote:
>>>
>>> W.R.T. the loop limits, is it possible to use a default max_loops
>> value in
>>> case when cpu_khz is not set? The reason is that on Moorestown
>> platform
>>> we need to do an early APIC setup before tsc_init(), so cpu_khz is 0
>> at the
>>> time we setup local APIC. The result is that we hit
>> WARN_ON(max_loops<= 0)
>>> on Moorestown for early APIC setup.
>>>
>>> The early APIC setup is needed because Moorestown does not have a PIT
>> and the
>>> system timer interrupts are routed via IOAPIC.
>>>
>>
>> Can't MRST install a quick ballpark value into cpu_khz?
>>
> yes, we can do that to avoid the warning. the true cpu_khz can then be set
> in tsc_init by platform specific calibration code. That is one option.
> 

Seems like a reasonable thing to do to me.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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