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Message-ID: <alpine.DEB.2.00.1007011526010.23160@cl320.eecs.utk.edu>
Date:	Thu, 1 Jul 2010 15:30:16 -0400 (EDT)
From:	Vince Weaver <vweaver1@...s.utk.edu>
To:	Ingo Molnar <mingo@...e.hu>
cc:	LKML <linux-kernel@...r.kernel.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>
Subject: [PATCH] perf wrong branches event on AMD
Hello
while doing some performance counter validation tests on some assembly 
language programs I noticed that the "branches:u" count was very wrong on 
AMD machines.
It looks like the wrong event was selected.
This is why event selection needs to be in user-space... it could be fixed 
instantly there, but the way things are done now it will take months to 
years for this fix to filter down to those trying to use perf counters...
Signed-off-by: Vince Weaver <vweaver1@...s.utk.edu>
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 611df11..c2897b7 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -102,8 +102,8 @@ static const u64 amd_perfmon_event_map[] =
   [PERF_COUNT_HW_INSTRUCTIONS]		= 0x00c0,
   [PERF_COUNT_HW_CACHE_REFERENCES]	= 0x0080,
   [PERF_COUNT_HW_CACHE_MISSES]		= 0x0081,
-  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= 0x00c4,
-  [PERF_COUNT_HW_BRANCH_MISSES]		= 0x00c5,
+  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= 0x00c2,
+  [PERF_COUNT_HW_BRANCH_MISSES]		= 0x00c3,
 };
 
 static u64 amd_pmu_event_map(int hw_event)
--
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