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Message-ID: <20100807214803.GC10428@lenovo>
Date:	Sun, 8 Aug 2010 01:48:03 +0400
From:	Cyrill Gorcunov <gorcunov@...il.com>
To:	Ingo Molnar <mingo@...e.hu>
Cc:	LKML <linux-kernel@...r.kernel.org>,
	Lin Ming <ming.m.lin@...el.com>,
	Stephane Eranian <eranian@...gle.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Frederic Weisbecker <fweisbec@...il.com>,
	"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH] perf,x86: P4 PMU -- update nmi irq statistics and
	unmask lvt entry properly

On Thu, Aug 05, 2010 at 07:09:17PM +0400, Cyrill Gorcunov wrote:
> In case if last active performance counter is not overflowed at
> moment of NMI being triggered by another counter, the irq statistics
> may miss an update stage. As a more serious consequence -- apic quirk
> may not be triggered so apic lvt entry stay masked.
> 
> Tested-by: Lin Ming <ming.m.lin@...el.com>
> Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
> CC: Lin Ming <ming.m.lin@...el.com>
> CC: Stephane Eranian <eranian@...gle.com>
> CC: Peter Zijlstra <a.p.zijlstra@...llo.nl>
> CC: Ingo Molnar <mingo@...e.hu>
> CC: Frederic Weisbecker <fweisbec@...il.com>
> ---

Ping? Frederic, perhaps you'll pick it up?

	-- Cyrill
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