linux-kernel - [tip:perf/urgent] perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properly

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Date:	Tue, 10 Aug 2010 07:09:48 GMT
From:	tip-bot for Cyrill Gorcunov <gorcunov@...nvz.org>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, eranian@...gle.com, hpa@...or.com,
	mingo@...hat.com, gorcunov@...nvz.org, a.p.zijlstra@...llo.nl,
	fweisbec@...il.com, ming.m.lin@...el.com, tglx@...utronix.de,
	mingo@...e.hu
Subject: [tip:perf/urgent] perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properly

Commit-ID:  1c250d709fdc8aa5bf42d90be99428a01a256a55
Gitweb:     http://git.kernel.org/tip/1c250d709fdc8aa5bf42d90be99428a01a256a55
Author:     Cyrill Gorcunov <gorcunov@...nvz.org>
AuthorDate: Thu, 5 Aug 2010 19:09:17 +0400
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Sun, 8 Aug 2010 22:53:50 +0200

perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properly

In case if last active performance counter is not overflowed at
moment of NMI being triggered by another counter, the irq
statistics may miss an update stage. As a more serious
consequence -- apic quirk may not be triggered so apic lvt entry
stay masked.

Tested-by: Lin Ming <ming.m.lin@...el.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Frederic Weisbecker <fweisbec@...il.com>
LKML-Reference: <20100805150917.GA6311@...ovo>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/perf_event_p4.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 107711b..febb12c 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -656,6 +656,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
 	cpuc = &__get_cpu_var(cpu_hw_events);
 
 	for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+		int overflow;
 
 		if (!test_bit(idx, cpuc->active_mask))
 			continue;
@@ -666,12 +667,14 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
 		WARN_ON_ONCE(hwc->idx != idx);
 
 		/* it might be unflagged overflow */
-		handled = p4_pmu_clear_cccr_ovf(hwc);
+		overflow = p4_pmu_clear_cccr_ovf(hwc);
 
 		val = x86_perf_event_update(event);
-		if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
+		if (!overflow && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
 			continue;
 
+		handled += overflow;
+
 		/* event overflow for sure */
 		data.period = event->hw.last_period;
 
@@ -687,7 +690,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
 		inc_irq_stat(apic_perf_irqs);
 	}
 
-	return handled;
+	return handled > 0;
 }
 
 /*
--
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