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Message-ID: <20100814095351.6a996187@infradead.org>
Date: Sat, 14 Aug 2010 09:53:51 -0700
From: Arjan van de Ven <arjan@...radead.org>
To: paulmck@...ux.vnet.ibm.com
Cc: Pavel Machek <pavel@....cz>, Alan Cox <alan@...rguk.ukuu.org.uk>,
Felipe Contreras <felipe.contreras@...il.com>,
"Ted Ts'o" <tytso@....edu>, david@...g.hm,
Brian Swetland <swetland@...gle.com>,
linux-pm@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
arve@...roid.com, mjg59@...f.ucam.org, florian@...kler.org,
rjw@...k.pl, stern@...land.harvard.edu, peterz@...radead.org,
tglx@...utronix.de, menage@...gle.com, david-b@...bell.net,
James.Bottomley@...e.de, swmike@....pp.se, galibert@...ox.com,
dipankar@...ibm.com
Subject: Re: Attempted summary of suspend-blockers LKML thread, take three
On Sat, 14 Aug 2010 08:10:48 -0700
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com> wrote:
>
> So once you are down to one CPU, the last CPU shuts the system off,
> itself included? Or does the last CPU "run" in a deep idle state
> throughout suspend? (My guess is the former, and I am also curious
> whether the cache SRAMs are powered off, etc. But figured I should
> ask rather than guessing.)
they tend to go "off".
however I think you're making an assumption that there is a
real difference between a deep idle state and "off"....
For modern x86 hardware, that assumption isn't really valid.
(other than a very very small sram that stores register content in the
idle case)
--
Arjan van de Ven Intel Open Source Technology Centre
For development, discussion and tips for power savings,
visit http://www.lesswatts.org
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