linux-kernel - Re: [PATCH] gpio: Add generic driver for simple memory mapped controllers

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20100826183623.GA24381@opensource.wolfsonmicro.com>
Date:	Thu, 26 Aug 2010 19:36:23 +0100
From:	Mark Brown <broonie@...nsource.wolfsonmicro.com>
To:	David Brownell <david-b@...bell.net>
Cc:	Alan Cox <alan@...rguk.ukuu.org.uk>,
	Anton Vorontsov <cbouatmailru@...il.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	David Brownell <dbrownell@...rs.sourceforge.net>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] gpio: Add generic driver for simple memory mapped
	controllers

On Thu, Aug 26, 2010 at 10:34:58AM -0700, David Brownell wrote:
> --- On Thu, 8/26/10, Alan Cox <alan@...rguk.ukuu.org.uk> wrote:

> > > Just rename it to match the IP block used.

> > There are zillions of IP blocks that have that interface,

> If there are "zillions" that suggests the HW
> engineers have version/naming issues just like
> certain software engineers.  Only goes to show
> how close Verilog and VHDL are to software! :)

Half the thing here is that it's barely IP - it's the sort of thing
that's so trivial to implement that it'd take more time to locate a
suitable IP than to just hook up the output pins to the register map
directly.

> > how exactly do
> > you propose to rename it.

> My suggestion was to use the name provided/used
> by the hardware engineers.  (E.g. whatever the
> Verilog or VHDL equivalent of a module name is.)

That's not going to happen, nobody's sharing any IP for this.

> If I understand you correctly, those engineers
> are not reusing a named module; they are at best
> just copying/pasting some Verilog/VHDL and adding
> ASIC/SoC/.../FPGA-specific hacks.  (Which calls into
> question just how much assurance there can be that
> one driver will work reliably for all instances...

Essentially all this sort of GPIO controller is is a straight wire
through of a set of register bits to an output signal (especially if you
don't have a separate clear register).  It's the first thing a hardware
engineer would think of for implementing this - it's not even copy and
paste really, my understanding is that normally it's just basic plumbing
to wire the relevant signals together.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/