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Message-ID: <20100826220747.6da28e97@lxorguk.ukuu.org.uk>
Date: Thu, 26 Aug 2010 22:07:47 +0100
From: Alan Cox <alan@...rguk.ukuu.org.uk>
To: David Brownell <david-b@...bell.net>
Cc: Anton Vorontsov <cbouatmailru@...il.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Samuel Ortiz <sameo@...ux.intel.com>,
Mark Brown <broonie@...nsource.wolfsonmicro.com>,
David Brownell <dbrownell@...rs.sourceforge.net>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] gpio: Add generic driver for simple memory mapped
controllers
O> If there are "zillions" that suggests the HW
> engineers have version/naming issues just like
> certain software engineers. Only goes to show
> how close Verilog and VHDL are to software! :)
Verilog ? Its far far more primitive than that. You'll find exactly that
arrangement in prehistoric 8bit micro support chips - eg the 6522. In
fact the only reason I can see for not using it on primitive 8bit micro
devices is that they *already* had more features.
> are not reusing a named module; they are at best
> just copying/pasting some Verilog/VHDL and adding
> ASIC/SoC/.../FPGA-specific hacks. (Which calls into
> question just how much assurance there can be that
> one driver will work reliably for all instances...
No they are implementing trivial common sense logic. It's a bit like
complaining we have multiple drivers that use addition.
I think you need a reality check. Its a VLSI undergraduate project level
device, or was back when they taught undergraduates a sampling of chip
design by drawing the transistors. This is "my first logic design" stuff.
Alan
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