[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <AANLkTi=WYU2=4Hu7tb+TSrhJw9K9du19_KjMcG3ij=qn@mail.gmail.com>
Date: Wed, 29 Sep 2010 15:28:56 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Robert Richter <robert.richter@....com>
Cc: "mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"yinghai@...nel.org" <yinghai@...nel.org>,
"andi@...stfloor.org" <andi@...stfloor.org>,
"peterz@...radead.org" <peterz@...radead.org>,
"gorcunov@...il.com" <gorcunov@...il.com>,
"ying.huang@...el.com" <ying.huang@...el.com>,
"fweisbec@...il.com" <fweisbec@...il.com>,
"ming.m.lin@...el.com" <ming.m.lin@...el.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"dzickus@...hat.com" <dzickus@...hat.com>,
"mingo@...e.hu" <mingo@...e.hu>
Subject: Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after
disabling counters
On Wed, Sep 29, 2010 at 3:13 PM, Stephane Eranian <eranian@...gle.com> wrote:
> On Wed, Sep 29, 2010 at 2:54 PM, Robert Richter <robert.richter@....com> wrote:
>> On 29.09.10 14:53:01, Robert Richter wrote:
>>> Stephane,
>>>
>>> On 29.09.10 08:26:41, Stephane Eranian wrote:
>>> > You've applied the fix only to the generic X86 interrupt handler
>>> > which is currently used by AMD64 processors.
>>>
>>> (... and P4).
>>>
Well, in tip-x86, I don't see your fix in p4_pmu_handle_irq(). Is
that pending?
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists