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Message-ID: <20100929133923.GI13563@erda.amd.com>
Date: Wed, 29 Sep 2010 15:39:23 +0200
From: Robert Richter <robert.richter@....com>
To: Stephane Eranian <eranian@...gle.com>
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Subject: Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after
disabling counters
On 29.09.10 09:13:30, Stephane Eranian wrote:
> for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
> struct perf_event *event = cpuc->events[bit];
>
> handled++;
>
> if (!test_bit(bit, cpuc->active_mask))
/* spurious interrupt here */
> continue;
> }
>
> I think the logic is similar. What makes the difference, it seems, is that
> handled is incremented unconditionally if the ovfl_mask says it has
> an overflow, i.e., before active_mask is checked.
Note that we can use here for_each_set_bit() since we have the status
mask. So we may increment handled always.
On AMD we use for_each_counter(), but only check active counters to
avoid unnecessary rdmsrl()s for unused counters. But here, we only can
increment handled if we detect an overflow or if we know a counter was
disabled.
> On Westmere, we've seen situations where the overflow mask and active
> mask did not agree.
It's the 'spurious interrupt' branch above.
> On counter disable, the overflow mask bit is not cleared, thus one may iterate
> in the loop and fail the active_mask. But handled would be incremented in that
> case, so that would behave like in your patch.
Right, spurious interrupts are counted and a 'handled' is returned.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
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