linux-kernel - Re: [PATCH resend 5/9] MIPS: sync after cacheflush

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Message-ID: <4CBD5CC9.8070706@niisi.msk.ru>
Date:	Tue, 19 Oct 2010 12:54:33 +0400
From:	"Gleb O. Raiko" <raiko@...si.msk.ru>
To:	Kevin Cernekee <cernekee@...il.com>
CC:	Ralf Baechle <ralf@...ux-mips.org>,
	Shinya Kuribayashi <skuribay@...ox.com>,
	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH resend 5/9] MIPS: sync after cacheflush

On 18.10.2010 23:41, Kevin Cernekee wrote:
> I have not been able to find any official statement from MIPS that
> says that CACHE + SYNC should be used, but that seems like the most
> intuitive way to implement things on the hardware side.

Indeed, both Architecture for Programmers in Vol. 2 describing 
instruction sets not so clearly say that sync is needed after cache.
For example, documents with rev. 2.62, p. 92 (for MIPS32 ISA) or p. 96 
(for MIPS64).

Considering whether just sync enough I'd like to note some boxes may 
implement dma master and slave blocks to be unsynchronized. Also,there 
may be write buffers somewhere in the path between cpu, memory, and even 
a dma master.

BTW, we have plat_extra_sync_for_device which has appropriate name but 
invented to do things before cache flush. :-) It seems we need another 
one which will do something after.

Gleb.
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