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Message-ID: <AANLkTimag1+h4ujWYmWXXBspizL1+j2JtJDf+=AmWpPa@mail.gmail.com>
Date: Fri, 12 Nov 2010 11:41:27 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Andi Kleen <andi@...stfloor.org>,
Corey Ashford <cjashfor@...ux.vnet.ibm.com>,
Andi Kleen <ak@...ux.intel.com>, linux-kernel@...r.kernel.org,
fweisbec@...il.com, mingo@...e.hu, acme@...hat.com
Subject: Re: [PATCH 2/3] perf: Add support for extra parameters for raw events
On Thu, Nov 11, 2010 at 9:37 PM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> On Thu, 2010-11-11 at 21:12 +0100, Andi Kleen wrote:
>> > Also, I think we can use the same mechanism to program the
>> > PEBS-load-latency MSR, right?
>>
>> I haven't looked at that, but if it's a per core resource
>> the infrastructure can be reused at least.
>
> Can't remember if the load-latency msr is per-core, but its an extra reg
> that needs to be set.
Load latency is luckily per thread. Nothing special to do to handle this one.
We can restore its value from attr->config.
>
> The nhm/wsm LBR config msr is per-core though, so that could use your
> infrastructure too.
>
Exactly.
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