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Message-ID: <AANLkTin3khDj2FpJ-SY+xhLykiKer23uAjRdBM4m8gXD@mail.gmail.com>
Date: Fri, 12 Nov 2010 11:39:20 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Andi Kleen <andi@...stfloor.org>,
Corey Ashford <cjashfor@...ux.vnet.ibm.com>,
Andi Kleen <ak@...ux.intel.com>, linux-kernel@...r.kernel.org,
fweisbec@...il.com, mingo@...e.hu, acme@...hat.com
Subject: Re: [PATCH 2/3] perf: Add support for extra parameters for raw events
On Thu, Nov 11, 2010 at 8:59 PM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> On Thu, 2010-11-11 at 20:49 +0100, Andi Kleen wrote:
>> > I think it would have parsed OK, but it is a confusing syntax to
>> > look at. I should point out that there are also the u,k,h modifiers
>> > which can be specified, even on raw events, so the full syntax looks
>> > something like:
>> >
>> > -e rXXXX[+YYYY][:u|:k|:h]
>>
>> Ok I can fix the help text for that.
>
> If we're frobbing it in the existing config qword, do we still need
> special syntax?
>
I don't think you need special syntax. You can simply come up with
the 64-bit raw hex value. corey recently added a small utility to do
this via libpfm4: perf stat -e `evt2raw unhalted_core_cycles:u` ....
With libpfm4, I'll expose the event as a normal one. Therefore
you would do:
perf stat -e OFFCORE_RESPONSE_0:PF_DATA_RD:REMOTE_DRAM ...
This will encode to:
attr.config = 0x01b7ULL | ((1ULL << 4) | (1ULL << 13)) << 32
> Also, I think we can use the same mechanism to program the
> PEBS-load-latency MSR, right?
>
Yes, we could hardcode the latency the same way.
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