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Message-ID: <20101118215820.GM6028@lenovo>
Date:	Fri, 19 Nov 2010 00:58:20 +0300
From:	Cyrill Gorcunov <gorcunov@...il.com>
To:	Don Zickus <dzickus@...hat.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	Jason Wessel <jason.wessel@...driver.com>,
	Ingo Molnar <mingo@...e.hu>,
	Robert Richter <robert.richter@....com>, ying.huang@...el.com,
	Andi Kleen <andi@...stfloor.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Frederic Weisbecker <fweisbec@...il.com>
Subject: Re: [V2 PATCH 0/6] x86, NMI: give NMI handler a face-lift

On Fri, Nov 19, 2010 at 12:56:50AM +0300, Cyrill Gorcunov wrote:
> On Thu, Nov 18, 2010 at 02:32:47PM -0500, Don Zickus wrote:
> ... 
> > On a side note I think I have a fix for the p4 problem but will probably
> > need Cyril to look at it.  Basically in, p4_pmu_clear_cccr_ovf() it is
> > using the high part of the cccr register to determine if the counter
> > overflowed, when it probably wants to use the low bits of the cccr
> > register and high bits of the event_base.
> >
> 
> Thanks a hige Don for pointing to the problem. Here is the patch.

s/hige/huge/ :)
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