linux-kernel - Re: [V2 PATCH 0/6] x86, NMI: give NMI handler a face-lift

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Message-ID: <20101118221554.GA31253@lenovo>
Date:	Fri, 19 Nov 2010 01:15:54 +0300
From:	Cyrill Gorcunov <gorcunov@...il.com>
To:	Don Zickus <dzickus@...hat.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	Jason Wessel <jason.wessel@...driver.com>,
	Ingo Molnar <mingo@...e.hu>,
	Robert Richter <robert.richter@....com>, ying.huang@...el.com,
	Andi Kleen <andi@...stfloor.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Frederic Weisbecker <fweisbec@...il.com>
Subject: Re: [V2 PATCH 0/6] x86, NMI: give NMI handler a face-lift

On Fri, Nov 19, 2010 at 12:56:50AM +0300, Cyrill Gorcunov wrote:
...
> ---
>  arch/x86/kernel/cpu/perf_event_p4.c |   21 ++++++++++++---------
>  1 file changed, 12 insertions(+), 9 deletions(-)
> 
> Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
> =====================================================================
> --- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event_p4.c
> +++ linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
> @@ -753,19 +753,22 @@ out:
>  
>  static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
>  {
> -	int overflow = 0;
> -	u32 low, high;
> +	u32 overflow = 0;
> +	u32 low, low_cccr, high;
>  
> -	rdmsr(hwc->config_base + hwc->idx, low, high);
> +	/* an official way for overflow indication */
> +	rdmsr(hwc->config_base + hwc->idx, low_cccr, high);
> +	overflow |= (low_cccr & P4_CCCR_OVF);
> +
> +	/* unflagged overflows */
> +	rdmsr(hwc->event_base + hwc->idx, low, high);
> +	overflow |= high & 0x80000000;
>  
> -	/* we need to check high bit for unflagged overflows */
> -	if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) {
> -		overflow = 1;
> +	if (overflow)

this should be rather 'if (low_cccr & P4_CCCR_OVF)' otherwise
redundant checking_wrmsrl called, updated patch below

/me seems should not touch code at all today 
---

perf, x86: P4 PMU - Fix unflagged overflows handling

Jason pointed out that kgdb no longer works with new
nmi-watchdog. Don found the reason -- P4 PMU reads CCCR
register instead of counter itself, it forces NMIs to
be eaten by perf subsystem.

Fix it by reading a proper register.

v2: Call checking_wrmsrl only if needed

Reported-by: Jason Wessel <jason.wessel@...driver.com>
Reported-by: Don Zickus <dzickus@...hat.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
---

Jason I've removed your Tested-by because the patch differ a bit

 arch/x86/kernel/cpu/perf_event_p4.c |   20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
=====================================================================
--- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event_p4.c
+++ linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
@@ -753,19 +753,23 @@ out:
 
 static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
 {
-	int overflow = 0;
-	u32 low, high;
+	u32 overflow = 0;
+	u32 low_cntr, low_cccr, high;
 
-	rdmsr(hwc->config_base + hwc->idx, low, high);
+	/* an official way for overflow indication */
+	rdmsr(hwc->config_base + hwc->idx, low_cccr, high);
+	overflow |= (low_cccr & P4_CCCR_OVF);
 
-	/* we need to check high bit for unflagged overflows */
-	if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) {
-		overflow = 1;
+	if (overflow) {
 		(void)checking_wrmsrl(hwc->config_base + hwc->idx,
-			((u64)low) & ~P4_CCCR_OVF);
+				((u64)low_cccr) & ~P4_CCCR_OVF);
 	}
 
-	return overflow;
+	/* unflagged overflows */
+	rdmsr(hwc->event_base + hwc->idx, low_cntr, high);
+	overflow |= high & 0x80000000;
+
+	return overflow > 0;
 }
 
 static void p4_pmu_disable_pebs(void)
--
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