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Message-ID: <m38w0l2gzh.fsf@intrepid.localdomain>
Date: Mon, 22 Nov 2010 22:20:02 +0100
From: Krzysztof Halasa <khc@...waw.pl>
To: Bernie Innocenti <bernie@...ewiz.org>
Cc: Ward Vandewege <ward@....org>, lkml <linux-kernel@...r.kernel.org>,
Jan Seiffert <kaffeemonster@...glemail.com>,
netdev@...r.kernel.org
Subject: Re: pc300too on a modern kernel?
(added Cc: netdev)
Bernie Innocenti <bernie@...ewiz.org> writes:
> Now the question is: why do we get so many spurious interrupts?
Let me see... we call sca_tx_done() on (isr0 & 0x2020) which are DMIB3
and DMIB1, which in turn are (EOT & (EOTE = 0) | EOM & (EOME = 1)), i.e.
the interrupt is generated on EOM (end of message = packet).
It seems TN-PSC-339A/E is the answer: the interrupt is generated at the
end of the last DMA access filling the TX buffer. Only then the status
is written to the descriptor (=RAM). I guess it didn't make a difference
on older, slower machines, with slower paths from PCI to CPU.
Also I don't know if the descriptor status is being written in the same
DMA transfer (between the chip and on-board SRAM) as the last data
transfer. Perhaps it's another DMA request and arbitration, and perhaps
the chip has to wait for another transfer to finish.
> With this workaround applied, we're st seeing occasional clusters of
> packet loss. We're working to graph the ping loss alongside traffic to
> see if there's any correlation.
That's interesting. I remember seeing some TX underruns at higher
speeds, though nothing alike at 2 Mb/s. What bit rate are you using?
Does "ifconfig hdlc0" show any errors?
--
Krzysztof Halasa
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