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Message-ID: <AANLkTik2_VLiKfZNC3BJeFnqS8kp7bMOg6qhJ1yPGmej@mail.gmail.com>
Date: Tue, 23 Nov 2010 11:00:46 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Lin Ming <ming.m.lin@...el.com>, Andi Kleen <andi@...stfloor.org>,
Ingo Molnar <mingo@...e.hu>,
lkml <linux-kernel@...r.kernel.org>,
Frederic Weisbecker <fweisbec@...il.com>,
Arjan van de Ven <arjan@...radead.org>
Subject: Re: [RFC PATCH 2/3 v2] perf: Implement Nehalem uncore pmu
On Sun, Nov 21, 2010 at 6:44 PM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> On Sun, 2010-11-21 at 22:04 +0800, Lin Ming wrote:
>> On Sun, 2010-11-21 at 20:46 +0800, Andi Kleen wrote:
>> > >
>> > > 2. Uncore pmu NMI handling
>> > >
>> > > All the 4 cores are programmed to receive uncore counter overflow
>> > > interrupt. The NMI handler(running on 1 of the 4 cores) handle all
>> > > counters enabled by all 4 cores.
>> >
>> > Really for uncore monitoring there is no need to use an NMI handler.
>> > You can't profile a core anyways, so you can just delay the reporting
>> > a little bit. It may simplify the code to not use one here
>> > and just use an ordinary handler.
>>
>> OK, I can use on ordinary interrupt handler here.
>
> Does the hardware actually allow using a different interrupt source?
>
It does not. It's using whatever you've programmed into the APIC
LVT vector, AFAIK. Uncore interrupt mode is enabled via
IA32_DEBUGCTL. Regarless of sampling or not, you need the interrupt
to virtualize the counters to 64 bits.
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