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Message-ID: <1293497301.10593.27.camel@sli10-conroe>
Date: Tue, 28 Dec 2010 08:48:21 +0800
From: Shaohua Li <shaohua.li@...el.com>
To: Tejun Heo <tj@...nel.org>
Cc: Sam Ravnborg <sam@...nborg.org>,
lkml <linux-kernel@...r.kernel.org>,
"hpa@...or.com" <hpa@...or.com>,
Andrew Morton <akpm@...ux-foundation.org>,
"eric.dumazet@...il.com" <eric.dumazet@...il.com>,
"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>
Subject: Re: [PATCH RESEND percpu#for-next] percpu: align percpu readmostly
subsection to cacheline
On Mon, 2010-12-27 at 21:37 +0800, Tejun Heo wrote:
> Currently percpu readmostly subsection may share cachelines with other
> percpu subsections which may result in unnecessary cacheline bounce
> and performance degradation.
>
> This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
> linker macros, makes each arch linker scripts specify its cacheline
> size and use it to align percpu subsections.
>
> This is based on Shaohua's x86 only patch.
>
> Signed-off-by: Tejun Heo <tj@...nel.org>
> Cc: Shaohua Li <shaohua.li@...el.com>
> ---
> Shaohua, can you please verify this achieves the same result? If no
> one objects, I'll route it through the percpu tree.
yes, the x86 part works.
Thanks,
Shaohua
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