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Message-ID: <1294205040.9261.4.camel@minggr.sh.intel.com>
Date: Wed, 05 Jan 2011 13:24:00 +0800
From: Lin Ming <ming.m.lin@...el.com>
To: Borislav Petkov <bp@...64.org>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Ingo Molnar <mingo@...e.hu>, Andi Kleen <andi@...stfloor.org>,
Stephane Eranian <eranian@...gle.com>,
"Richter, Robert" <robert.richter@....com>,
lkml <linux-kernel@...r.kernel.org>,
Andreas Herrmann <andreas.herrmann3@....com>
Subject: Re: [PATCH 5/7] perf: Optimise topology iteration
On Tue, 2011-01-04 at 22:22 +0800, Borislav Petkov wrote:
> Adding Andreas since this is his code.
>
> On Tue, Jan 04, 2011 at 07:06:16AM -0500, Peter Zijlstra wrote:
> > On Mon, 2010-12-27 at 23:38 +0800, Lin Ming wrote:
> > > Currently we iterate the full machine looking for a matching core_id/nb
> > > for the percore and the amd northbridge stuff , using a smaller topology
> > > mask makes sense.
> > >
> > > Signed-off-by: Lin Ming <ming.m.lin@...el.com>
> > > ---
> > > arch/x86/kernel/cpu/perf_event_amd.c | 2 +-
> > > arch/x86/kernel/cpu/perf_event_intel.c | 2 +-
> > > 2 files changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
> > > index 67e2202..5a3b7b8 100644
> > > --- a/arch/x86/kernel/cpu/perf_event_amd.c
> > > +++ b/arch/x86/kernel/cpu/perf_event_amd.c
> > > @@ -323,7 +323,7 @@ static void amd_pmu_cpu_starting(int cpu)
> > > nb_id = amd_get_nb_id(cpu);
> > > WARN_ON_ONCE(nb_id == BAD_APICID);
> > >
> > > - for_each_online_cpu(i) {
> > > + for_each_cpu(i, topology_core_cpumask(cpu)) {
> > > nb = per_cpu(cpu_hw_events, i).amd_nb;
> > > if (WARN_ON_ONCE(!nb))
> > > continue;
> >
> > Borislav, is topology_core_cpumask() the right mask for northbridge_id
> > span? I could imagine Magny-Cours would have all 12 cores in the
> > core_cpumask() and have the node_mask() be half that.
>
> So, topology_core_cpumask() or cpu_core_mask() both are cpu_core_map
> which represents the socket mask. I.e., on a multisocket cpu you'll have
> in it all the cores on one socket. A 12-cores Magny-Cours contains two
> internal northbridges and this mask will have 12 bits set.
>
> AFAICT, you want to iterate over the cores on a single node here
> (an internal node in the Magny-Cours case) so for this we have the
> llc_shared_map. See near the top of cache_shared_cpu_map_setup() in
> <arch/x86/kernel/cpu/intel_cacheinfo.c> for an example.
cpu_coregroup_mask() seems the right mask for northbridge_id span.
arch/x86/kernel/smpboot.c:
/* maps the cpu to the sched domain representing multi-core */
const struct cpumask *cpu_coregroup_mask(int cpu)
{
struct cpuinfo_x86 *c = &cpu_data(cpu);
/*
* For perf, we return last level cache shared map.
* And for power savings, we return cpu_core_map
*/
if ((sched_mc_power_savings || sched_smt_power_savings) &&
!(cpu_has(c, X86_FEATURE_AMD_DCM)))
return cpu_core_mask(cpu);
else
return c->llc_shared_map;
}
>
> node_mask() is roughly the same but contains correct info only with
> CONFIG_NUMA on and correct SRAT table on the system.
>
> HTH.
>
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