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Message-ID: <4D5533CB.8000003@ru.mvista.com>
Date:	Fri, 11 Feb 2011 16:04:11 +0300
From:	Sergei Shtylyov <sshtylyov@...sta.com>
To:	Bartlomiej Zolnierkiewicz <bzolnier@...il.com>
CC:	Sergei Shtylyov <sshtylyov@...sta.com>, linux-ide@...r.kernel.org,
	linux-kernel@...r.kernel.org, Alan Cox <alan@...rguk.ukuu.org.uk>
Subject: Re: [PATCH 21/20] ata_piix: add new PIIX_FLAG_* flags

Hello.

On 08-02-2011 21:18, Bartlomiej Zolnierkiewicz wrote:

>>> Turn open-coded checks in piix_set_timings() into PIIX_FLAG_* flags
>>> per suggestion from Alan Cox.

>>> Suggested-by: Alan Cox<alan@...rguk.ukuu.org.uk>
>>> Signed-off-by: Bartlomiej Zolnierkiewicz<bzolnier@...il.com>

>> [...]

>>> Index: b/drivers/ata/ata_piix.c
>>> ===================================================================
>>> --- a/drivers/ata/ata_piix.c
>>> +++ b/drivers/ata/ata_piix.c
>>> @@ -133,6 +133,8 @@ enum {
>>>         PIIX_FLAG_CHECKINTR     = (1<<  28), /* make sure PCI INTx enabled
>>> */
>>>         PIIX_FLAG_SIDPR         = (1<<  29), /* SATA idx/data pair regs */
>>> +       PIIX_FLAG_NO_SITRE      = (1<<  30), /* no SITRE register */

>>    The register in question is called SIDETIM, SITRE is a bit that enables
>> its use.

> ICH4-M databook that I have at hand (Intel IDE PRM seems to be gone
> from Intel's website, though I'm sure I have a backup _somewhere_) it

    If you mean ICH IDE Controller PRM (29860004.pdf), it indeed calls the 
register *SITR* (yet it has SIDETIM mentioned in the table 37 :-). Intel seems 
  not very consistent in its documentation. :-)

> Thanks,
> Bartlomiej

WBR, Sergei
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