linux-kernel - Re: [PATCH 5/6] x86, NMI: Allow NMI reason io port (0x61) to be processed on any CPU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20110225214512.GA25823@redhat.com>
Date:	Fri, 25 Feb 2011 16:45:12 -0500
From:	Don Zickus <dzickus@...hat.com>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
Cc:	x86@...nel.org, Peter Zijlstra <peterz@...radead.org>,
	Robert Richter <robert.richter@....com>, ying.huang@...el.com,
	gorcunov@...il.com, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/6] x86, NMI: Allow NMI reason io port (0x61) to be
 processed on any CPU

On Wed, Feb 23, 2011 at 02:39:58AM +0000, Maciej W. Rozycki wrote:
>  [Catching up with old e-mail...]
> 
>  In line with the comment above that you're removing -- have you (or 
> anyone else) adjusted code elsewhere so that external NMIs are actually 
> delivered to processors other than the BSP?  I can't see such code in this 
> series nor an explanation as to why it wouldn't be needed.
> 
>  For the record -- the piece of code above reflects our setup where the 
> LINT1 input is enabled and configured for the NMI delivery mode on the BSP 
> only and all the other processors have this line disabled in their local 
> APIC units.  If system NMIs are to be handled after the removal of the 
> BSP, then another processor has to be selected and configured for NMI 
> reception.  Alternatively, all local units could have their LINT1 input 
> enabled and arbitrate handling, although it would be quite disruptive as 
> all the processors would take the interrupt if it happened.  OTOH it would 
> be more fault-tolerant in the case of a CPU failure.  On a typical x86 box 
> the system NMI cannot be routed to an I/O APIC input.

Intel requested this.  From my understanding they are working on
technology to allow removal of the BSP and still having the system work
correctly.  This patch is probably just the first step of many.  But I
don't really know what they are working on nor what else they need.

Cheers,
Don
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/