linux-kernel - Re: [PATCH] oprofile: Allow setting EDGE/INV/CMASK for Intel counter events

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Message-ID: <20110316150450.GO31407@erda.amd.com>
Date:	Wed, 16 Mar 2011 16:04:51 +0100
From:	Robert Richter <robert.richter@....com>
To:	Andi Kleen <andi@...stfloor.org>
CC:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"oprofile-list@...ts.sf.net" <oprofile-list@...ts.sf.net>,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH] oprofile: Allow setting EDGE/INV/CMASK for Intel
 counter events

On 11.03.11 14:12:28, Andi Kleen wrote:
> From: Andi Kleen <ak@...ux.intel.com>
> 
> For some performance events it's useful to set the EDGE and INV
> bits and the CMASK mask in the counter control register. The list
> of predefined events Intel releases for each CPU has some events which
> require these settings to get more "natural" to use higher level events.
> 
> oprofile currently doesn't allow this.
> 
> This patch adds new extra configuration fields for them, so that
> they can be specified in oprofilefs.
> 
> An updated oprofile daemon can then make use of this to set them.
> 
> Signed-off-by: Andi Kleen <ak@...ux.intel.com>
> ---
>  arch/x86/oprofile/nmi_int.c    |    4 ++++
>  arch/x86/oprofile/op_counter.h |    1 +
>  2 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
> index e2b7b0c..bace252 100644
> --- a/arch/x86/oprofile/nmi_int.c
> +++ b/arch/x86/oprofile/nmi_int.c
> @@ -49,6 +49,9 @@ u64 op_x86_get_ctrl(struct op_x86_model_spec const *model,
>  	val |= counter_config->user ? ARCH_PERFMON_EVENTSEL_USR : 0;
>  	val |= counter_config->kernel ? ARCH_PERFMON_EVENTSEL_OS : 0;
>  	val |= (counter_config->unit_mask & 0xFF) << 8;
> +	val |= counter_config->extra & (ARCH_PERFMON_EVENTSEL_INV|
> +					ARCH_PERFMON_EVENTSEL_EDGE|
> +					ARCH_PERFMON_EVENTSEL_CMASK);

I would like to write the actual value back so that userland may read
it:

	counter_config->extra &= (ARCH_PERFMON_EVENTSEL_INV|
                         ARCH_PERFMON_EVENTSEL_EDGE|
                         ARCH_PERFMON_EVENTSEL_CMASK);
	val |= counter_config->extra;

The value will not be updated emmediately but at least after profiling
was started.

As an alternative, maybe we better put this extra bits in the
unit_mask, e.g. in bits [31:16] of the unit mask for bits [31:16] of
PerfEvtSel? Then, we simply could use the current userland to set it
up.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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