linux-kernel - [PATCH 1/2] i7core_edac: Add xeon 5600 generic non core registers

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Message-ID: <1301491283-14128-1-git-send-email-samuel.gabrielsson@gmail.com>
Date:	Wed, 30 Mar 2011 15:21:22 +0200
From:	Samuel Gabrielsson <samuel.gabrielsson@...il.com>
To:	mchehab@...hat.com
CC:	linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
	Samuel Gabrielsson <samuel.gabrielsson@...il.com>
Subject: [PATCH 1/2] i7core_edac: Add xeon 5600 generic non core registers

This enables writing to registers in device 0 function 0 such as
MC_CFG_CONTROL. This also fixes a bug for intel xeon 5600 series
when writing to inject_enable where we would get an Oops because
pvt->pci_noncore was not set.

Signed-off-by: Samuel Gabrielsson <samuel.gabrielsson@...il.com>
---
 drivers/edac/i7core_edac.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index 81154ab..1db6092 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -322,6 +322,9 @@ static const struct pci_id_descr pci_dev_descr_lynnfield[] = {
 };
 
 static const struct pci_id_descr pci_dev_descr_i7core_westmere[] = {
+		/* Generic Non-core registers */
+	{ PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2) },
+
 		/* Memory controller */
 	{ PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2)     },
 	{ PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2)  },
-- 
1.7.1

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