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Message-ID: <4D9E579C.3030101@intel.com>
Date: Fri, 08 Apr 2011 08:32:28 +0800
From: Huang Ying <ying.huang@...el.com>
To: Russell King - ARM Linux <linux@....linux.org.uk>
CC: Len Brown <lenb@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Andi Kleen <andi@...stfloor.org>,
"Luck, Tony" <tony.luck@...el.com>,
"linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
Richard Henderson <rth@...ddle.net>,
Mikael Starvik <starvik@...s.com>,
David Howells <dhowells@...hat.com>,
Yoshinori Sato <ysato@...rs.sourceforge.jp>,
Hirokazu Takata <takata@...ux-m32r.org>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Michal Simek <monstr@...str.eu>,
Ralf Baechle <ralf@...ux-mips.org>,
Kyle McMartin <kyle@...artin.ca>,
Martin Schwidefsky <schwidefsky@...ibm.com>,
Chen Liqin <liqin.chen@...plusct.com>,
"David S. Miller" <davem@...emloft.net>,
Ingo Molnar <mingo@...hat.com>, Chris Zankel <chris@...kel.net>
Subject: Re: [PATCH -v2 1/4] Add Kconfig option ARCH_HAVE_NMI_SAFE_CMPXCHG
On 04/08/2011 01:39 AM, Russell King - ARM Linux wrote:
> On Thu, Apr 07, 2011 at 09:29:03AM +0800, Huang Ying wrote:
>> cmpxchg() is widely used by lockless code, including NMI-safe lockless
>> code. But on some architectures, the cmpxchg() implementation is not
>> NMI-safe, on these architectures the lockless code may need to a
>> spin_trylock_irqsave() based implementation.
>>
>> This patch adds a Kconfig option: ARCH_HAVE_NMI_SAFE_CMPXCHG, so that
>> NMI-safe lockless code can depend on it or provide different
>> implementation according to it.
>>
>> On many architectures, cmpxchg is only NMI-safe for several specific
>> operand sizes. So, ARCH_HAVE_NMI_SAFE_CMPXCHG define in this patch
>> only guarantees cmpxchg is NMI-safe for sizeof(unsigned long).
>
> As this no longer touches any ARM code, I thinky you can drop me from the
> CC list. Thanks.
OK. Will do this.
Best Regards,
Huang Ying
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