linux-kernel - Re: [PATCH v2] x86/mrst: correct pin to irq mapping

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Message-ID: <20110410060154.GA24684@elte.hu>
Date:	Sun, 10 Apr 2011 08:01:54 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Jacob Pan <jacob.jun.pan@...ux.intel.com>
Cc:	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	LKML <linux-kernel@...r.kernel.org>,
	Feng Tang <feng.tang@...el.com>,
	Alan Cox <alan@...ux.intel.com>,
	Arjan van de Ven <arjan@...ux.intel.com>
Subject: Re: [PATCH v2] x86/mrst: correct pin to irq mapping


* Jacob Pan <jacob.jun.pan@...ux.intel.com> wrote:

> As a result, apbt timer and RTC interrupts on Moorestown are within legacy
> IRQ range.
> 
> sh-3.2# cat /proc/interrupts
>            CPU0       CPU1
>   0:      11249          0   IO-APIC-edge      apbt0
>   1:          0      12271   IO-APIC-edge      apbt1
>   8:        887          0   IO-APIC-fasteoi   dw_spi
>  13:          0          0   IO-APIC-fasteoi   INTEL_MID_DMAC2
>  14:          0          0   IO-APIC-fasteoi   rtc0

Is there a 'before the patch' /proc/interrupts output as well? Supposedly it's 
different and seeing that different output is *way* more descriptive to the 
casual commit log reader than a textual explanation only.

Also, i guess this would be .40 material, right?

Thanks,

	Ingo
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