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Message-ID: <20110422170055.GB16607@tassilo.jf.intel.com>
Date:	Fri, 22 Apr 2011 10:00:55 -0700
From:	Andi Kleen <ak@...ux.intel.com>
To:	arun@...rma-home.net
Cc:	Ingo Molnar <mingo@...e.hu>, Stephane Eranian <eranian@...gle.com>,
	Arnaldo Carvalho de Melo <acme@...radead.org>,
	linux-kernel@...r.kernel.org,
	Peter Zijlstra <peterz@...radead.org>,
	Lin Ming <ming.m.lin@...el.com>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>, eranian@...il.com,
	Arun Sharma <asharma@...com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [generalized cache events] Re: [PATCH 1/1] perf tools: Add
 missing user space support for config1/config2

> One could argue that all you need is cycles and instructions. If there is an
> expensive load, you'll see that the load instruction takes many cycles and
> you can infer that it's a cache miss.

That is when you can actually recognize which of the last load instructions
caused the problem. Often skid on Out of order CPUs makes this very hard to 
identify which actual load caused the the long stall (or if they all stalled)

There's a way around it of course using advanced events, but not with
cycles.

> I don't see why exposing all vendor defined events is harmful

Simple: without vendor events you cannot answer a lot of questions.

-Andi

-- 
ak@...ux.intel.com -- Speaking for myself only
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