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Message-ID: <20110425195554.GB391@elte.hu>
Date: Mon, 25 Apr 2011 21:55:54 +0200
From: Ingo Molnar <mingo@...e.hu>
To: Andi Kleen <ak@...ux.intel.com>
Cc: Peter Zijlstra <peterz@...radead.org>,
Stephane Eranian <eranian@...gle.com>, arun@...rma-home.net,
Arnaldo Carvalho de Melo <acme@...radead.org>,
linux-kernel@...r.kernel.org, Lin Ming <ming.m.lin@...el.com>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>, eranian@...il.com,
Arun Sharma <asharma@...com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [generalized cache events] Re: [PATCH 1/1] perf tools: Add
missing user space support for config1/config2
* Andi Kleen <ak@...ux.intel.com> wrote:
> One example of this we had recently in the kernel:
>
> function accesses three global objects. Scalability tanks when the test is
> run with more CPUs. Now the hit is near the three memory accesses. Which one
> is the one that is actually bouncing cache lines?
that's not an example - you are still only giving vague, untestable,
unverifiable references. You need to give us something specific and
reproducible - preferably a testcase.
Peter and me are doing lots of scalability work in the core kernel and for most
problems i've met it was enough if we knew the function name - the scalability
problem is typically very obvious from that point on - and an annotated profile
makes it even more obvious.
I've never met a situation what you describe, that it was not possible to
disambiguate a real SMP bounce - and i've been fixing SMP bounces in the kernel
for over ten years.
So you really will have to back up your point with an accurate, reproducible
testcase - vague statements like the ones you are making i do not accept at
face value, sorry.
Thanks,
Ingo
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