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Message-ID: <20110429194520.14a8cce5@jbarnes-desktop>
Date:	Fri, 29 Apr 2011 19:45:20 -0700
From:	Jesse Barnes <jbarnes@...tuousgeek.org>
To:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc:	Thomas Hellstrom <thellstrom@...are.com>,
	FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Arnd Bergmann <arnd@...db.de>, linux-kernel@...r.kernel.org,
	linaro-mm-sig@...ts.linaro.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [Linaro-mm-sig] [RFC] ARM DMA mapping TODO, v1

On Sat, 30 Apr 2011 08:46:54 +1000
Benjamin Herrenschmidt <benh@...nel.crashing.org> wrote:

> > Ah if it were that simple. :)  There are big costs to implementing full
> > coherency for all your devices, as you well know, so it's just not a
> > question of benchmark optimization.  
> 
> But it -is- that simple.
> 
> You do have to deal with coherency anyways for your PHB unless you start
> advocating that we should make everything else non coherent as well. So
> you have the logic. Just make your GPU operate on the same protocol.
> 
> It's really only a perf tradeoff I believe. And a bad one.

Ok so I was the one oversimplifying. :)  Yes, it's definitely doable to
make a cache coherent PHB, and is awfully nice from a perf and
programming perspective.

But as you say, to make a high performance one for things like gfx, or
even to handle things like atomic ops, adds a lot of expense (in the
case of graphics, a whole lot unless you can integrate with the CPU,
and even then display can be tough to deal with).

I don't see even good coherent implementations being good enough for
high perf graphics in the near term (though at least on relatively high
power designs like Sandy Bridge we're getting close) so we'll have to
solve the uncached and simultaneous mapping issue both for today's
hardware and the near future.

-- 
Jesse Barnes, Intel Open Source Technology Center
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