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Message-ID: <20110601222226.GH27166@one.firstfloor.org>
Date: Thu, 2 Jun 2011 00:22:26 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Daniel Haid <d.haid@...i.tv>
Cc: linux-kernel@...r.kernel.org,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Andi Kleen <andi@...stfloor.org>, airlied@...ux.ie,
alexdeucher@...il.com
Subject: Re: Question about iommu on x86_64 and radeon driver.
On Wed, Jun 01, 2011 at 10:58:08PM +0100, Daniel Haid wrote:
> I have also found out the following. In
>
> line 741 of drivers/gpu/drm/radeon/radeon_device.c
>
> there is a comment "PCIE - can handle 40-bits." -
> I have a PCIE card - and then need_dma32 is not set.
>
> So if I read it correctly the ttm allocation
> routines will allocate memory over 4GB.
>
> But if PCIE can handle 40 bits, why does swiotlb
> give out a bounce buffer to the radeon driver at all?
swiotlb only does what the driver tells it
Also new drivers default to 4GB, so if a driver wants
something else it has to set it explicitely.
Also BTW the driver should work in any case, so likely
something else is wrong.
Really you need to discuss this with the radeon driver people.
Readded cc.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only.
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