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Date:	Wed, 01 Jun 2011 22:58:08 +0100
From:	Daniel Haid <d.haid@...i.tv>
To:	<linux-kernel@...r.kernel.org>
Cc:	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Andi Kleen <andi@...stfloor.org>
Subject: Re: Question about iommu on x86_64 and radeon driver.

 I have also found out the following. In

 line 741 of drivers/gpu/drm/radeon/radeon_device.c

 there is a comment "PCIE - can handle 40-bits." -
 I have a PCIE card - and then need_dma32 is not set.

 So if I read it correctly the ttm allocation
 routines will allocate memory over 4GB.

 But if PCIE can handle 40 bits, why does swiotlb
 give out a bounce buffer to the radeon driver at all?

 Shouldn't

 (dma_capable(dev, dev_addr, size) && !swiotlb_force)

 on line 672 of lib/swiotlb.c be true?



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