linux-kernel - Re: [PATCH 1/4] perf, x86: Add Intel Nehalem/Westmere uncore pmu

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Message-ID: <20110704215706.GH15637@one.firstfloor.org>
Date:	Mon, 4 Jul 2011 23:57:06 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Lin Ming <ming.m.lin@...el.com>
Cc:	Andi Kleen <andi@...stfloor.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Ingo Molnar <mingo@...e.hu>,
	Stephane Eranian <eranian@...gle.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/4] perf, x86: Add Intel Nehalem/Westmere uncore pmu

> > There are no NMIs without sampling, so at least the comment seems bogus.
> > Perhaps the code could be a bit simplified now without atomics.
> 
> I'm not sure if uncore PMU interrupt need to be enabled for counting
> only. What do you think?

Only for overflow handling to accumulate into a larger counter, but it doesn't 
need to be an NMI for that.  But it's not strictly required I would say, 
44(?) bits are probably enough for near all use cases.

At least initially not having one is fine I think.

-Andi
-- 
ak@...ux.intel.com -- Speaking for myself only.
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