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Message-ID: <4E30327C.5020509@redhat.com>
Date: Wed, 27 Jul 2011 18:45:00 +0300
From: Avi Kivity <avi@...hat.com>
To: Borislav Petkov <bp@...64.org>
CC: Ingo Molnar <mingo@...e.hu>,
"Przywara, Andre" <Andre.Przywara@....com>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>,
"Pohlack, Martin" <Martin.Pohlack@....com>
Subject: Re: [PATCH] x86, AMD: Correct F15h IC aliasing issue
On 07/27/2011 06:37 PM, Borislav Petkov wrote:
> On Wed, Jul 27, 2011 at 05:30:56AM -0400, Avi Kivity wrote:
> > On 07/27/2011 09:59 AM, Ingo Molnar wrote:
> > > >
> > > > Yeah, actually the idea is to patch the kernel only this one time
> > > > and never ever be needing to do this for future CPUs, for this
> > > > matter.
> > >
> > > But the check you have added turns this workaround on for all family
> > > 0x15 CPUs. If a family 0x15 CPU is built with a larger or more
> > > associative cache, one that does not need the workaround, we would
> > > still turn on the workaround.
> >
> > Similarly, if family 0x21 CPUs have a similar arrangement (with
> > identical or different cache sizes and associativity) the hardcoded
> > check will fail.
>
> So, in short, I$ design is the same for all F15h processors so a family
> 0x15 check suffices here.
What about F21h processors? I see you're not checking them.
Is there any reason the check should not be made based on topology?
--
error compiling committee.c: too many arguments to function
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