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Date:	Tue, 16 Aug 2011 11:48:27 +0800
From:	Shawn Guo <shawn.guo@...escale.com>
To:	Stephen Warren <swarren@...dia.com>
CC:	Grant Likely <grant.likely@...retlab.ca>,
	Colin Cross <ccross@...roid.com>,
	Erik Gilling <konkers@...roid.com>,
	Olof Johansson <olof@...om.net>,
	Russell King <linux@....linux.org.uk>,
	Arnd Bergmann <arnd@...db.de>,
	<devicetree-discuss@...ts.ozlabs.org>,
	<linux-tegra@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>,
	Belisko Marek <marek.belisko@...il.com>,
	Jamie Iles <jamie@...ieiles.com>,
	Sergei Shtylyov <sshtylyov@...sta.com>
Subject: Re: [RFC PATCH v2 06/13] docs/dt: Document nvidia,tegra20-pinmux
 binding

On Mon, Aug 15, 2011 at 02:28:13PM -0600, Stephen Warren wrote:
> Signed-off-by: Stephen Warren <swarren@...dia.com>
> ---
>  .../devicetree/bindings/pinmux/pinmux_nvidia.txt   |  294 ++++++++++++++++++++
>  1 files changed, 294 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt
> 
[...]
> +
> +Example of a gpio-controller node:
> +

You meant pinmux node instead of gpio.

Regards,
Shawn

> +	pinmux: pinmux@...00000 {
> +		compatible = "nvidia,tegra20-pinmux";
> +		reg = < 0x70000000 0xc00 >;
> +		nvidia,mux-groups {
> +			cdev1 {
> +				nvidia,function = "plla_out";
> +			};
> +			cdev2 {
> +				nvidia,function = "pllp_out4";
> +				nvidia,pull-down;
> +				nvidia,tristate;
> +			};
> +		};
> +		nvidia,drive-groups {
> +			sdio1 {
> +				nvidia,schmitt;
> +				nvidia,drive-power = <1>;
> +				nvidia,pull-down-strength = <31>;
> +				nvidia,pull-up-strength = <31>;
> +				nvidia,slew-rate-rising = <3>;
> +				nvidia,slew-rate-falling = <3>;
> +			};
> +		};
> +	};
> +
> -- 
> 1.7.0.4
> 
> 

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