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Message-ID: <CACRpkdbB0A6y2vFRV58vvU2DY+zMV+DjS16d71+bajBegTuRdQ@mail.gmail.com>
Date:	Mon, 22 Aug 2011 14:38:16 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Jamie Iles <jamie@...ieiles.com>
Cc:	Linus Walleij <linus.walleij@...ricsson.com>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	Grant Likely <grant.likely@...retlab.ca>,
	Stephen Warren <swarren@...dia.com>,
	Russell King <linux@....linux.org.uk>,
	Joe Perches <joe@...ches.com>,
	Linaro Dev <linaro-dev@...ts.linaro.org>,
	Lee Jones <lee.jones@...aro.org>, Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH 1/4 v4] drivers: create a pin control subsystem

On Sun, Aug 21, 2011 at 4:24 PM, Jamie Iles <jamie@...ieiles.com> wrote:

> for device tree, when the gpio
> controllers are registered, the base is typically dynamically assigned.  I
> suspect that this can be solved in the device tree binding for the controller
> that references the bindings of the pinctrl, but this would require
> registering the gpio_ranges at runtime (or at least the bases).

Oh registering ranges at runtime ... crap. But possible I think.

> So perhaps if we had:
>
> struct pinctrl_gpio_range {
>    unsigned int pinctrl_base;
>    struct gpio_chip *chip;
> }
>
> and then gpio_request_enable was:
>
> int (*gpio_request_enable)(struct pinctrl_dev *pctldev,
>                           struct gpio_chip *gc,
>                           unsigned offset)
>
> Then have pinctrl_register_gpio_chip()?

I'm not following - the struct gpio_chip is opaque outside the gpio
subsystem, I've proposed patches to make it public but they have
been NAK:ed.

Which means pinctrl has no use of that pointer.

What is the intended purpose of sending that thing in?

Right now my range struct looks like this:

/**
 * struct pinctrl_gpio_range - each pin controller can provide subranges of
 * the GPIO number space to be handled by the controller
 * @name: a name for the chip in this range
 * @id: an ID number for the chip in this range
 * @base: base offset of the GPIO range
 * @npins: number of pins in the GPIO range, including the base number
 */
struct pinctrl_gpio_range {
        const char name[16];
        unsigned int id;
        unsigned int base;
        unsigned int npins;
};

> For the static devices case then we can require gc->base must match the
> pinctrl gpio base. For the device tree case we could do some matching of
> device_nodes from the gpio_chip to the pinctrl definitions?

Can't do that since we can't look into struct gpio_chip intrinsics...

But we can register ranges at runtime, I'll just make the pin controller keep
a list of GPIO ranges, simple.

Thanks,
Linus Walleij
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