linux-kernel - Re: [PATCH] memcg: remove unneeded preempt

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Message-ID: <1e295500-5d1f-45dd-aa5b-3d2da2cf1a62@email.android.com>
Date:	Thu, 25 Aug 2011 11:34:34 -0700
From:	James Bottomley <James.bottomley@...senPartnership.com>
To:	Christoph Lameter <cl@...ux.com>
CC:	Peter Zijlstra <peterz@...radead.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Greg Thelen <gthelen@...gle.com>, linux-kernel@...r.kernel.org,
	linux-mm@...ck.org,
	KAMEZAWA Hiroyuki <kamezawa.hiroyu@...fujitsu.com>,
	Balbir Singh <bsingharora@...il.com>,
	Daisuke Nishimura <nishimura@....nes.nec.co.jp>,
	linux-arch@...r.kernel.org
Subject: Re: [PATCH] memcg: remove unneeded preempt_disable



Christoph Lameter <cl@...ux.com> wrote:

>On Thu, 25 Aug 2011, James Bottomley wrote:
>
>> >ARM seems to have these LDREX/STREX instructions for that purpose
>which
>> >seem to be used for generating atomic instructions without lockes. I
>> >guess
>> >other RISC architectures have similar means of doing it?
>>
>> Arm isn't really risc.  Most don't.  However even with ldrex/strex
>you need two instructions for rmw.
>
>Well then what is "really risc"? RISC is an old beaten down marketing
>term
>AFAICT and ARM claims it too.

Reduced Instruction Set Computer.  This is why we're unlikely to have complex atomic instructions: the principle of risc is that you build them up from basic ones.

James 
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