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Message-ID: <493994B35A117E4F832F97C4719C4C040133090FB8@orsmsx505.amr.corp.intel.com>
Date: Mon, 29 Aug 2011 18:12:11 -0700
From: "Yu, Fenghua" <fenghua.yu@...el.com>
To: Andi Kleen <andi@...stfloor.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: "x86@...nel.org" <x86@...nel.org>, Andi Kleen <ak@...ux.intel.com>,
"Yu, Fenghua" <fenghua.yu@...el.com>
Subject: RE: [PATCH 1/3] x86, intel: Output microcode revision v4
>--- a/arch/x86/kernel/cpu/intel.c
>+++ b/arch/x86/kernel/cpu/intel.c
>@@ -364,6 +364,15 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
>
> early_init_intel(c);
>
>+ if (c->x86 >= 6 && !cpu_has(c, X86_FEATURE_IA64)) {
>+ unsigned lower_word;
>+
>+ wrmsr(MSR_IA32_UCODE_REV, 0, 0);
>+ /* The CPUID 1 fills in the MSR as documented in the SDM */
>+ cpuid_eax(1);
>+ rdmsr(MSR_IA32_UCODE_REV, lower_word, c->microcode);
>+ }
>+
The patch initializes c->microcode AFTER it was used in early_init_intel(c) in your patch set [2/3].
Thanks.
-Fenghua
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