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Message-ID: <20110901091111.GB30417@e102144-lin.cambridge.arm.com>
Date:	Thu, 1 Sep 2011 10:11:11 +0100
From:	Will Deacon <will.deacon@....com>
To:	Mark Salter <msalter@...hat.com>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"ming.lei@...onical.com" <ming.lei@...onical.com>,
	"stern@...land.harvard.edu" <stern@...land.harvard.edu>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 0/3] RFC: addition to DMA API

Hi Mark,

On Wed, Aug 31, 2011 at 10:30:11PM +0100, Mark Salter wrote:
> This patch set arose out of a discussion on linux-arm concerning a
> performance problem with USB on some ARMv7 based platforms. The
> problem was tracked down by ming.lei@...onical.com and found to be
> the result of CPU writes to DMA-coherent memory being delayed in a
> write buffer between the CPU and memory. One proposed patch fixed
> only the immediate problem with the USB EHCI driver, but several
> folks thought a more general approach was needed, so I put this series
> of patches together as a starting point for wider discussion outside
> the ARM specific list.

[...]

Whilst I'm in favour of this because it seems to be solving a real problem
(especially on OMAP4), I think we should get to the bottom of the issue
before augmenting the coherent DMA API. We currently have the following
unanswered questions:

(1) Why does a nosmp kernel not suffer from this problem?

(2) Why do *some* Tegra platforms seem to suffer whilst others do not?

(3) Can this problem be solved by configuring the hardware appropriately?

If (3) is true, then we might be better off solving it that way, although
I'd be interested to see if flushing CPU write buffers makes a difference to
I/O performance on other architectures using non-cacheable memory for
coherent DMA.

Will
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