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Date:	Wed, 21 Sep 2011 12:08:42 +0200
From:	Robert Richter <robert.richter@....com>
To:	Don Zickus <dzickus@...hat.com>
CC:	"x86@...nel.org" <x86@...nel.org>,
	Andi Kleen <andi@...stfloor.org>,
	Peter Zijlstra <peterz@...radead.org>,
	"ying.huang@...el.com" <ying.huang@...el.com>,
	LKML <linux-kernel@...r.kernel.org>,
	"paulmck@...ux.vnet.ibm.com" <paulmck@...ux.vnet.ibm.com>,
	"avi@...hat.com" <avi@...hat.com>,
	"jeremy@...p.org" <jeremy@...p.org>
Subject: Re: [V5][PATCH 4/6] x86, nmi:  add in logic to handle multiple
 events and unknown NMIs

On 20.09.11 10:43:10, Don Zickus wrote:
> @@ -87,6 +87,16 @@ static int notrace __kprobes nmi_handle(unsigned int type, struct pt_regs *regs)
>  
>  		handled += a->handler(type, regs);
>  
> +		/*
> + 		 * Optimization: only loop once if this is not a 
> + 		 * back-to-back NMI.  The idea is nothing is dropped
> + 		 * on the first NMI, only on the second of a back-to-back
> + 		 * NMI.  No need to waste cycles going through all the
> + 		 * handlers.
> + 		 */
> +		if (!b2b && handled)
> +			break;

In rare cases we will lose nmis here.

We see a back-to-back nmi in the case if a 2 nmi source triggers
*after* the nmi handler is entered. Depending on the internal cpu
timing influenced by microcode and SMM code execution, the nmi may not
entered immediately. So all sources that trigger *before* the nmi
handler is entered raise only one nmi with no subsequent nmi.

However, as these cases should be very rare, I think we can live with
it in favor of the optimization to jump out the handler chain and save
lot of cpu cycles esp. in the case of heavy PMI load.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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