linux-kernel - Re: [PATCH v3 0/3] genirq: handling GIC per-cpu interrupts

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Message-ID: <20110926201836.GA27355@huya.qualcomm.com>
Date:	Mon, 26 Sep 2011 13:18:36 -0700
From:	David Brown <davidb@...eaurora.org>
To:	Marc Zyngier <marc.zyngier@....com>
Cc:	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Bryan Huntsman <bryanh@...eaurora.org>,
	David Brown <davidb@...eaurora.org>,
	Kukjin Kim <kgene.kim@...sung.com>,
	Magnus Damm <magnus.damm@...il.com>,
	Paul Mundt <lethal@...ux-sh.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Tony Lindgren <tony@...mide.com>
Subject: Re: [PATCH v3 0/3] genirq: handling GIC per-cpu interrupts

On Fri, Sep 23, 2011 at 05:03:05PM +0100, Marc Zyngier wrote:

> Tested on ARM Versatile Express (Cortex A15), ARM RealView PB11MP,
> OMAP4 (Panda) and Tegra (Harmony). Patch series against next-20110923.
> 
> From v2:
> - Fixed !GENERIC_HARDIRQS build
> - Fixed request_percpu_irq documentation
> 
> From v1:
> - General tidy-up after Thomas' review. I've kept the config option
>   for the time being until we can sort out the anonymous union
>   problem.
> 
> Marc Zyngier (3):
>   genirq: add support for per-cpu dev_id interrupts
>   ARM: gic: consolidate PPI handling
>   ARM: gic, local timers: use the request_percpu_irq() interface

I've tested this on an MSM8660 based off of next-20110926.

Tested-by: David Brown <davidb@...eaurora.org>
Acked-by: David Brown <davidb@...eaurora.org>

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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