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Message-ID: <CABPqkBRPvKxkyH6tVK1AQDBTbyrE3Cy0wjz64qaE2p0dzPRYig@mail.gmail.com>
Date: Tue, 4 Oct 2011 14:35:38 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Andi Kleen <andi@...stfloor.org>
Cc: Robert Richter <robert.richter@....com>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...e.hu>,
LKML <linux-kernel@...r.kernel.org>,
Don Zickus <dzickus@...hat.com>
Subject: Re: [V3][PATCH 0/7] perf, x86: Implement AMD IBS
On Sat, Sep 24, 2011 at 12:28 AM, Andi Kleen <andi@...stfloor.org> wrote:
>
> Robert Richter <robert.richter@....com> writes:
> >
> > I think we could extend perf report to parse also ibs samples. The
> > only thing we need for it should be the pmu name/type mapping in the
> > perf.data header and the pmu type in the sample. See my comment on
> > Stephane's patch '[PATCH] perf: make perf.data more self-descriptive
> > (v5)'.
>
> I would like to have a similar user tool for Intel PEBS data.
>
> I have some hacks currently to dump more data from the PEBS record and
> it's useful for some situations. I was actually thinking of adapting
> Robert's tool, but integrating it into other tools is fine too.
>
There is Lin Ming's patch to expose PEBS Load Latency information.
I will post a patch to export more of the machine state later on.
> Sometimes a "perf print-samples" to print individual samples
> would be useful too (it's already possible with -R, but very unfriendly
> without post processing)
>
> -Andi
>
> --
> ak@...ux.intel.com -- Speaking for myself only
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