linux-kernel - Re: [PATCH 1/8] x86, apic.c: Disable irq0 if CPU enables ARAT for local apic timer

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Message-ID: <m2ehyq4z77.fsf@firstfloor.org>
Date:	Wed, 05 Oct 2011 19:43:24 -0700
From:	Andi Kleen <andi@...stfloor.org>
To:	"Yu\, Fenghua" <fenghua.yu@...el.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...e.hu>,
	H Peter Anvin <hpa@...or.com>,
	"Luck\, Tony" <tony.luck@...el.com>,
	"Mallick\, Asit K" <asit.k.mallick@...el.com>,
	"Siddha\, Suresh B" <suresh.b.siddha@...el.com>,
	Len Brown <lenb@...nel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	alan@...rguk.ukuu.org.uk
Subject: Re: [PATCH 1/8] x86, apic.c: Disable irq0 if CPU enables ARAT for local apic timer

"Yu, Fenghua" <fenghua.yu@...el.com> writes:
>
> SC1200 WDT DRIVER
> M:      Zwane Mwaikambo <zwane@....linux.org.uk>
> S:      Maintained
> F:      drivers/watchdog/sc1200wdt.c
>
> I was hoping Zwane knows which PCI quirks depends on CPU0.

At least one AMD SIS chipset relied on IRQ0 always being on CPU0 
Not sure we got a quirk for it because the existing code handled it
(I guess it's reasonable to just blacklist for all of SIS,
i don't think they ever did anything multi-socket)
Alan may remember more.

-Andi

-- 
ak@...ux.intel.com -- Speaking for myself only
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