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Message-Id: <e39f63$2h6thv@fmsmga002.fm.intel.com>
Date:	Wed, 02 Nov 2011 09:12:13 +0000
From:	Chris Wilson <chris@...is-wilson.co.uk>
To:	Keith Packard <keithp@...thp.com>, intel-gfx@...ts.freedesktop.org
Cc:	linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
	Keith Packard <keithp@...thp.com>
Subject: Re: [PATCH 6/7] drm/i915: Try harder during dp pattern 1 link training

On Tue,  1 Nov 2011 23:20:29 -0700, Keith Packard <keithp@...thp.com> wrote:
> Instead of going through the sequence just once, run through the whole
> set up to 5 times to see if something can work. This isn't part of the
> DP spec, but the BIOS seems to do it, and given that link training
> failure is so bad, it seems reasonable to follow suit.
> 
> Signed-off-by: Keith Packard <keithp@...thp.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   41 +++++++++++++++++++++++++-------------
>  1 files changed, 27 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 6be6a04..bf20a35 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1576,8 +1576,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
>  
>  	ret = intel_dp_aux_native_write(intel_dp,
>  					DP_TRAINING_LANE0_SET,
> -					intel_dp->train_set, 4);
> -	if (ret != 4)
> +					intel_dp->train_set,
> +					intel_dp->lane_count);
> +	if (ret != intel_dp->lane_count)
>  		return false;

This would seem to be a separate chunk to initiate training on only the
lanes we intend to use.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
--
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