linux-kernel - Re: [PATCH 2/2] ix86: atomic64 assembly improvements

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Message-Id: <4F183BCA020000780006DB68@nat28.tlf.novell.com>
Date:	Thu, 19 Jan 2012 14:50:34 +0000
From:	"Jan Beulich" <JBeulich@...e.com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	<mingo@...e.hu>, "eric.dumazet@...il.com" <eric.dumazet@...il.com>,
	<tglx@...utronix.de>, <luca@...a-barbieri.com>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] ix86: atomic64 assembly improvements

>>> On 19.01.12 at 15:44, "H. Peter Anvin" <hpa@...or.com> wrote:
> On 01/19/2012 01:18 AM, Jan Beulich wrote:
>> 
>> But the code is supposed to be correct even when caches are disabled
>> (in which case LOCK# will continue to be used even on modern CPUs),
>> and this case clearly isn't covered by the current implementation. It
>> may be a good idea to adjust the patch description accordingly, but I
>> see no reason to change the patch itself.
>> 
> 
> It doesn't have anything to do with caches on or off.

How does it not? If any part of the bus topology is only 32 bits wide,
a 64-bit read or write simply can't be executed atomically without
asserting LOCK#.

Jan

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